General Description
The MAX12555 is a 3.3V, 14-bit, 95Msps analog-to-digital
converter (ADC) featuring a fully differential wideband
track-and-hold (T/H) input amplifier, driving a low-noise
internal quantizer. The analog input stage accepts single-
ended or differential signals. The MAX12555 is optimized
for high dynamic performance, low power, and small
size. Excellent dynamic performance is maintained from
baseband to input frequencies of 175MHz and beyond,
making the MAX12555 ideal for intermediate-
frequency (IF) sampling applications.
Powered from a single 3.3V supply, the MAX12555 con-
sumes only 497mW while delivering a typical 72.1dB
signal-to-noise ratio (SNR) performance at a 175MHz
input frequency. In addition to low operating power, the
MAX12555 features a 300W power-down mode to
conserve power during idle periods.
A flexible reference structure allows the MAX12555 to use
the internal 2.048V bandgap reference or accept an
externally applied reference. The reference structure
allows the full-scale analog input range to be adjusted
from 0.35V to 1.10V. The MAX12555 provides a com-
mon-mode reference to simplify design and reduce exter-
nal component count in differential analog input circuits.
The MAX12555 supports either a single-ended or differ-
ential input clock. Wide variations in the clock duty
cycle are compensated with the ADC's internal duty-
cycle equalizer (DCE).
ADC conversion results are available through a 14-bit,
parallel, CMOS-compatible output bus. The digital out-
put format is pin selectable to be either two's comple-
ment or Gray code. A data-valid indicator eliminates
external components that are normally required for reli-
able digital interfacing. A separate digital power input
accepts a wide 1.7V to 3.6V supply, allowing the
MAX12555 to interface with various logic levels.
The MAX12555 is available in a 6mm x 6mm x 0.8mm,
40-pin thin QFN package with exposed paddle (EP),
and is specified for the extended industrial (-40C to
+85C) temperature range.
See the Pin-Compatible Versions table for a complete
family of 14-bit and 12-bit high-speed ADCs.
Applications
IF and Baseband Communication Receivers
Cellular, Point-to-Point Microwave, HFC, WLAN
Medical Imaging Including Positron Emission
Tomography (PET)
Video Imaging
Portable Instrumentation
Low-Power Data Acquisition
Features
Direct IF Sampling Up to 400MHz
Excellent Dynamic Performance
74.2dB/72.1dB SNR at f
IN
= 3MHz/175MHz
88.4dBc/74.7dBc SFDR at f
IN
= 3MHz/175MHz
Low Noise Floor: 74.7dBFS
3.3V Low-Power Operation
465mW (Single-Ended Clock Mode)
497mW (Differential Clock Mode)
300W (Power-Down Mode)
Fully Differential or Single-Ended Analog Input
Adjustable Full-Scale Analog Input Range
0.35V to 1.10V
Common-Mode Reference
CMOS-Compatible Outputs in Two's Complement
or Gray Code
Data-Valid Indicator Simplifies Digital Interface
Data Out-of-Range Indicator
Miniature, 6mm x 6mm x 0.8mm 40-Pin Thin QFN
Package with Exposed Paddle
Evaluation Kit Available (Order MAX12555EVKIT)
MAX12555
14-Bit, 95Msps, 3.3V ADC
________________________________________________________________ Maxim Integrated Products
1
Ordering Information
19-3447; Rev 0; 10/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART*
PIN-PACKAGE
PKG CODE
MAX12555ETL
40 Thin QFN
T4066-3
MAX12555ETL+
40 Thin QFN
T4066-3
Pin-Compatible Versions
PART
SAMPLING
RATE
(Msps)
RESOLUTION
(BITS)
TARGET
APPLICATION
MAX12555
95
14
IF/Baseband
MAX12554
80
14
IF/Baseband
MAX12553
65
14
IF/Baseband
MAX19538
95
12
IF/Baseband
MAX1209
80
12
IF
MAX1211
65
12
IF
MAX1208
80
12
Baseband
MAX1207
65
12
Baseband
MAX1206
40
12
Baseband
Pin Configuration appears at end of data sheet.
+Denotes lead-free package.
*All devices specified over the -40C to +85C operating range.
MAX12555
14-Bit, 95Msps, 3.3V ADC
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/
T = low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40C to +85C, unless otherwise noted. Typical values are at
T
A
= +25C.) (Note 1)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
DD
to GND ...........................................................-0.3V to +3.6V
OV
DD
to GND........-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
INP, INN to GND ...-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFIN, REFOUT, REFP, REFN, COM
to GND................-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
CLKP, CLKN, CLKTYP, G/T, DCE,
PD to GND ........-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
D13D0, DAV, DOR to GND....................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70C)
40-Pin Thin QFN 6mm x 6mm x 0.8mm
(derated 26.3mW/C above +70C)........................2105.3mW
Operating Temperature Range ...........................-40C to +85C
Junction Temperature ......................................................+150C
Storage Temperature Range .............................-65C to +150C
Lead Temperature (soldering 10s) ..................................+300C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
(Note 2)
Resolution
14
Bits
Integral Nonlinearity
INL
f
IN
= 3MHz
1.6
LSB
Differential Nonlinearity
DNL
f
IN
= 3MHz
0.65
LSB
Offset Error
V
REFIN
= 2.048V
0.1
0.78
%FS
Gain Error
V
REFIN
= 2.048V
0.35
5.3
%FS
ANALOG INPUT (INP, INN)
Differential Input Voltage Range
V
DIFF
Differential or single-ended inputs
1.024
V
Common-Mode Input Voltage
V
DD
/ 2
V
C
PAR
Fixed capacitance to ground
2
Input Capacitance
(Figure 3)
C
SAMPLE
Switched capacitance
4.5
pF
CONVERSION RATE
Maximum Clock Frequency
f
CLK
95
MHz
Minimum Clock Frequency
5
MHz
Data Latency
Figure 6
8.0
Clock
cycles
DYNAMIC CHARACTERISTICS
(Differential Inputs)
(Note 2)
Small-Signal Noise Floor
SSNF
Input at less than -35dBFS
-74.7
dBFS
f
IN
= 3MHz at -0.5dBFS (Notes 3, 4)
67.6
74.2
f
IN
= 47.5MHz at -0.5dBFS
73.8
f
IN
= 70MHz at -0.5dBFS
73.6
Signal-to-Noise Ratio
SNR
f
IN
= 175MHz at -0.5dBFS (Notes 3, 4)
66.9
72.1
dB
f
IN
= 3MHz at -0.5dBFS (Notes 3, 4)
66.7
73.8
f
IN
= 47.5MHz at -0.5dBFS
73.5
f
IN
= 70MHz at -0.5dBFS
72.5
Signal-to-Noise and Distortion
SINAD
f
IN
= 175MHz at -0.5dBFS (Notes 3, 4)
64.0
69.8
dB
MAX12555
14-Bit, 95Msps, 3.3V ADC
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40C to +85C, unless otherwise noted. Typical values are at
T
A
= +25C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
f
IN
= 3MHz at -0.5dBFS (Notes 3, 4)
73.5
88.4
f
IN
= 47.5MHz at -0.5dBFS
86.9
f
IN
= 70MHz at -0.5dBFS
80.5
Spurious-Free Dynamic Range
SFDR
f
IN
= 175MHz at -0.5dBFS (Notes 3, 4)
67.1
74.7
dBc
f
IN
= 3MHz at -0.5dBFS
-85.1
-72.8
f
IN
= 47.5MHz at -0.5dBFS
-84.7
f
IN
= 70MHz at -0.5dBFS
-79.0
Total Harmonic Distortion
THD
f
IN
= 175MHz at -0.5dBFS
-73.6
-66.1
dBc
f
IN
= 3MHz at -0.5dBFS
-89
f
IN
= 47.5MHz at -0.5dBFS
-92
f
IN
= 70MHz at -0.5dBFS
-91
Second Harmonic
HD2
f
IN
= 175MHz at -0.5dBFS
-82
dBc
f
IN
= 3MHz at -0.5dBFS
-92
f
IN
= 47.5MHz at -0.5dBFS
-93
f
IN
= 70MHz at -0.5dBFS
-81
Third Harmonic
HD3
f
IN
= 175MHz at -0.5dBFS
-75
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
-79
Intermodulation Distortion
IMD
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
-75
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
-80
Third-Order Intermodulation
IM3
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
-76
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
80
Two-Tone Spurious-Free
Dynamic Range
SFDR
TT
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
76
dBc
Aperture Delay
t
AD
Figure 4
1.2
ns
Aperture Jitter
t
AJ
Figure 4
<0.2
ps
RMS
Output Noise
n
OUT
INP = INN = COM
1.07
LSB
RMS
Overdrive Recovery Time
10% beyond full scale
1
Clock
cycles
MAX12555
14-Bit, 95Msps, 3.3V ADC
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40C to +85C, unless otherwise noted. Typical values are at
T
A
= +25C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INTERNAL REFERENCE (REFIN = REFOUT; V
REFP
, V
REFN
, and V
COM
are generated internally)
REFOUT Output Voltage
V
REFOUT
1.980
2.048
2.066
V
COM Output Voltage
V
COM
V
DD
/ 2
1.65
V
Differential-Reference Output
Voltage
V
REF
V
REF
= V
REFP
- V
REFN
= V
REFIN
x 3/4
1.536
V
REFOUT Load Regulation
-1.0mA < I
REFOUT
< +0.1mA
35
mV/mA
REFOUT Temperature Coefficient
TC
REF
+50
ppm/C
Short to V
DD
--sinking
0.24
REFOUT Short-Circuit Current
Short to GND--sourcing
2.1
mA
B U F F ER ED EXT ER N A L R EF ER EN C E
( R EF IN d r i v e n e x t e r n a l ly ; V
R EF IN
= 2.0 4 8 V, V
R EF P
, V
R EF N
, a n d V
C OM
a r e g e n e r a t e d in t e r n a lly )
REFIN Input Voltage
V
REFIN
2.048
V
REFP Output Voltage
V
REFP
(V
DD
/ 2) + (V
REFIN
x 3/8)
2.418
V
REFN Output Voltage
V
REFN
(V
DD
/ 2) - (V
REFIN
x 3/8)
0.882
V
COM Output Voltage
V
COM
V
DD
/ 2
1.60
1.65
1.70
V
Differential-Reference Output
Voltage
V
REF
V
REF
= V
REFP
- V
REN
= V
REFIN
x 3/4
1.454
1.604
V
Differential-Reference
Temperature Coefficient
25
ppm/C
REFIN Input Resistance
>50
M
U N B U F F ER ED EXT ER N A L R EF ER EN C E
( R EF IN = G N D ; V
R EF P
, V
R EF N
, a n d V
C OM
a r e a p p l ie d e x t e r n a l ly )
COM Input Voltage
V
COM
V
DD
/ 2
1.65
V
REFP Input Voltage
V
REFP
- V
COM
0.768
V
REFN Input Voltage
V
REFN
- V
COM
-0.768
V
Differential-Reference Input
Voltage
V
REF
V
REF
= V
REFP
- V
REFN
= V
REFIN
x 3/4
1.536
V
REFP Sink Current
I
REFP
V
REFP
= 2.418V
1.4
mA
REFN Source Current
I
REFN
V
REFN
= 0.882V
1.0
mA
COM Sink Current
I
COM
V
COM
= 1.650V
1.0
mA
REFP, REFN Capacitance
13
pF
COM Capacitance
6
pF
CLOCK INPUTS (CLKP, CLKN)
Single-Ended Input High
Threshold
V
IH
CLKTYP = GND, CLKN = GND
0.8 x
V
DD
V
Single-Ended Input Low
Threshold
V
IL
CLKTYP = GND, CLKN = GND
0.2 x
V
DD
V
Minimum Differential Input
Voltage Swing
CLKTYP = high
0.2
V
P-P
MAX12555
14-Bit, 95Msps, 3.3V ADC
_______________________________________________________________________________________
5
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 1.8V, GND = 0, REFIN = REFOUT (internal reference), V
IN
= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f
CLK
= 95MHz (50% duty cycle, 1.4V
P-P
square wave), T
A
= -40C to +85C, unless otherwise noted. Typical values are at
T
A
= +25C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Differential Input Common-Mode
Voltage
CLKTYP = high
V
DD
/ 2
V
Input Resistance
R
CLK
Figure 5
5
k
Input Capacitance
C
CLK
2
pF
DIGITAL INPUTS (CLKTYP, DCE, G/
T
, PD)
Input High Threshold
V
IH
0.8 x
OV
DD
V
Input Low Threshold
V
IL
0.2 x
OV
DD
V
V
IH
= OV
DD
5
Input Leakage Current
V
IL
= 0
5
A
Input Capacitance
C
DIN
5
pF
DIGITAL OUTPUTS (D13D0, DAV, DOR)
D13D0, DOR, I
SINK
= 200A
0.2
Output-Voltage Low
V
OL
DAV, I
SINK
= 600A
0.2
V
D13D0, DOR, I
SOURCE
= 200A
OV
DD
-
0.2
Output-Voltage High
V
OH
DAV, I
SOURCE
= 600A
OV
DD
-
0.2
V
Tri-State Leakage Current
I
LEAK
(Note 5)
5
A
D13D0, DOR Tri-State Output
Capacitance
C
OUT
(Note 5)
3
pF
DAV Tri-State Output
Capacitance
C
DAV
(Note 5)
6
pF
POWER REQUIREMENTS
Analog Supply Voltage
V
DD
3.15
3.3
3.60
V
Digital Output Supply Voltage
OV
DD
1.7
1.8
V
DD
+
0.3V
V
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS, CLKTYP = GND,
single-ended clock
141
Normal operating mode,
f
IN
= 175MHz at -0.5dBFS,
CLKTYP = OV
DD,
differential clock
150.6
165
Analog Supply Current
I
VDD
Power-down mode clock idle, PD = OV
DD
0.1
mA
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